Quantcast
Channel: Raspberry Pi Forums
Viewing all articles
Browse latest Browse all 7995

General • Re: Help with interfacing with Lyontek LY68L6400

$
0
0
So I tried a bunch of things, and none of them seem to work.

Here is my current pio code:

Code:

.program qspi_rw_4_nf.side_set 2.wrap_targetbegin:             set pindirs, 0xF        side 0b01 [7] ; Set pindirs to output. CS deasserted.    nop                     side 0b01 [7] ; Additional delay for Tcph.     out x, 8                side 0b01 ; x = number of nibbles to output.     out y, 8                side 0b01 ; y = number of nibbles to input.     jmp x--, writeloop      side 0b01 ; Pre decrement X to have correct number of loops.writeloop:    out pins, 4             side 0b00 [1] ; Write value on pins, lower clock. CS asserted.    jmp x--, writeloop      side 0b10 [1] ; This is when PSRAM reads the value.    jmp !y, write_end       side 0b00 [1] ; If this is a write-only operation, jump back to write_end.    set pindirs, 0x0        side 0b10 [1] ; Set pindirs to input.   1st wait clock    nop                     side 0b00 [1]     nop                     side 0b10 [1] ;                         2nd wait clock    nop                     side 0b00 [1]     nop                     side 0b10 [1] ;                         3rd wait clock    nop                     side 0b00 [1]     nop                     side 0b10 [1] ;                         4th wait clock    nop                     side 0b00 [1]     nop                     side 0b10 [1] ;                         5th wait clock    nop                     side 0b00 [1]     nop                     side 0b10 [1] ;                         6th wait clock    nop                     side 0b00 [1] ; +1 sys clk of delay after falling edge.    nop                     side 0b10 [1] ; +2 sys clk of delay after falling edge.     jmp y--, readloop       side 0b00 [1] ; +2 sys clk of delay after falling edge. Total 5clk = ~12.5ns, 6ns Taclk + 5ns input delay. Pre decrement Y to have correct number of loops. readloop:    in pins, 4              side 0b10 [1] ; Read the value from PSRAM.    jmp y--, readloop       side 0b00 [1]    nop                     side 0b10 [1]    nop                     side 0b00 [7] ; Additional delay for Tchd.    jmp begin               side 0b01 [1] ; Jump to start. CS deasserted early after read to wait for high-z before setting pindirs to output.write_end:    nop                     side 0b00 [1] ; Additional delay for Tchd..wrap
I also tried with 4clk of sys clk delay so ~10ns, didn't work out either.

When I write the values 0 - 63 and read them back I get something like this:

Code:

0   1   2   3   4   5   6   7   8 154  10 176  12 208  14  15  16  17  18  17  20  17  22  17  24 154  26  27  28  29  30  31  32  33  34  35  36  37  38  39  40 186  42  43  44  34  46  47  48  49  50  51  52  51  51  51  56 147  51 188  51  61  51  63
And that output is mostly consistent.

Any ideas what could be wrong here?

Statistics: Posted by DjordjeD — Sun Feb 08, 2026 11:55 pm



Viewing all articles
Browse latest Browse all 7995

Trending Articles