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General • PSRAM on high load

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RP2350B (WeAct Studio 2350BA4) with 8MB PSRAM handsoldered.

When I execute my dummy test program everything works as expected. Regardless of cached or uncached area is used, writes are immediately visible on subsequent reads (printf). That is a dummy program that initializes PSRAM, checks its ID, timing, etc.. The same init routine is used my larger project.

This other project generates (I think) considerable load on the bus fabric: DMA, PIO, all code runs from SRAM. These are generated mainly on core0 and the bus priority is set to high to that core. That is necessary because of IRQs to be handled very fast.
The other core handles USB (PIO USB), and some background work like PSRAM data transfer. But.
When I try to write 4 consequent bytes and then one word
- in case of cached area (0x11000000) the reading back is perfect. Once I call the

Code:

xip_cache_clean_all() 
the reading back - even in uint32_t chunks - fails. Even if I put a wait

Code:

qmi_hw->direct_csr & QMI_DIRECT_CSR_BUSY_BITS
to become 0. The reading back gives false data (0x00).
- in case of uncached area (0x1500000) the reading back is immediately garbage. If I read back byte by byte it is 0x00, 0x11, 0x22 and 0x33. When I read (right after these byte reads) a word, it is 0x44444444 (I write compeletely different values to my PSRAM). What the heck?!

AI told me that it might happen on a loaded MCU that the writes are not completely finished when I read right after write, but ... clean routines are blocking calls, no? I wait for the BUSY flag also. AI suggested to insert a a few NOPs. Oh come on! ...

What do I do wrong? Where shall I start to investigate? Any idea?

(Oh, the whole issue started when I realized, that my structs defined at PSRAM doesn't contain their data. It will be a second step of this investigation...)


Here is my test sequence:

Code:

        int c = 0;        psram_array[0] = 10;        psram_array[1] = 11;        psram_array[2] = 75;        psram_array[3] = 76;        __isb();        while(qmi_hw->direct_csr & QMI_DIRECT_CSR_BUSY_BITS) {            c++;            tight_loop_contents();        }                usb_printf("s: psr[2]: %d, writable: %s\n", psram_array[2], (xip_ctrl_hw->ctrl & XIP_CTRL_WRITABLE_M1_BITS) ? "true": "false");        for(int i=0; i<4; i++)            usb_printf("%d ", psram_array[i]);        usb_printf("\n%d\n", c);        *(volatile uint32_t *)&psram_array[4] = 0x15161718;        while(qmi_hw->direct_csr & QMI_DIRECT_CSR_BUSY_BITS) {            c++;            tight_loop_contents();        }                usb_printf("u %08x, %d\n", *(volatile uint32_t *)&psram_array[4], c);        xip_cache_clean_all();        while(qmi_hw->direct_csr & QMI_DIRECT_CSR_BUSY_BITS) {            c++;            tight_loop_contents();        }        for(int i=0; i<5; i+=4)            usb_printf("%08x ", *(uint32_t *)&psram_array[i]);

Statistics: Posted by dikdom — Sun Feb 01, 2026 11:51 pm



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