Hi,
I am also in need of enabling a 24Mhz clock signal on one or both csi interfaces.
Using pinctrl, I could verify the pin numbers you suggested
and according to bcm2712-rpi-5-b.dts gpios 34 and 46 is used for the regulator
There are references to cam0_clk and cam1_clk in the device-tree code but no way that I can see to route it to the pins on the csi connectors.
The possible functions for gpios 35 and 48 are
These pins do not support gpclk but it looks like pwm1 is already being used for the fan.
Would it still be possible to get a 24Mhz clock running on either gpio35 or gpio48 somehow?
I am also in need of enabling a 24Mhz clock signal on one or both csi interfaces.
Using pinctrl, I could verify the pin numbers you suggested
Code:
34: op dl pd | lo // CD0_IO0_MICCLK/GPIO34 = output35: no pd | lo // CD0_IO0_MICDAT0/GPIO35 = none46: op dl pd | lo // CD1_IO0_MICCLK/GPIO46 = output48: no pd | lo // CD1_IO1_MICDAT1/GPIO48 = noneCode:
cam0_reg: cam0_reg {compatible = "regulator-fixed";regulator-name = "cam0_reg";enable-active-high;gpio = <&rp1_gpio 34 0>; // CD0_IO0_MICCLK, to MIPI 0 connector};cam1_reg: cam1_reg {compatible = "regulator-fixed";regulator-name = "cam1_reg";enable-active-high;gpio = <&rp1_gpio 46 0>; // CD1_IO0_MICCLK, to MIPI 1 connector};The possible functions for gpios 35 and 48 are
Code:
PIN(35, spi8, pwm1, vbus0, i2c4, mic, gpio, proc_rio, _, _),PIN(48, pwm1, pcie_clkreq_n, spi7, mic, uart5, gpio, proc_rio, _, _),Would it still be possible to get a 24Mhz clock running on either gpio35 or gpio48 somehow?
Statistics: Posted by ncorneli — Thu Jun 12, 2025 8:39 am