Interesting update, thanks for sharing with us. Yeah, high currents are best done soldered. Thicker wires and a cheap pair of jumper cable clamps maybe... big clamps are somewhat overkilll but convenient for demos.
The thing I'm confused about is your readings -- I'm puzzled why you report V(source) at 8.8V
For NFETs, source should be tied to GND, drain to the steel wool. So V(GS) should be the ~3V3 of the GPIO output, V(Source-GND) = 0V, and V(DS) should be small once the FET is in On state. After all the specs of the IRLML2502 is good, but your readings does not make total sense. Do double-check the connections with onlilne examples of N-channel MOSFET circuit examples (I'm paranoid about PFET and NFET connections myself). It's possible that the readings can be explained by a reversed NFET and the V(DS) dropping across the tiny body diode.
So, V(GS) = 3.28V (okay) so check / clarify the following: V(DS), V(Source-GND), V(Drain-GND)
The thing I'm confused about is your readings -- I'm puzzled why you report V(source) at 8.8V
For NFETs, source should be tied to GND, drain to the steel wool. So V(GS) should be the ~3V3 of the GPIO output, V(Source-GND) = 0V, and V(DS) should be small once the FET is in On state. After all the specs of the IRLML2502 is good, but your readings does not make total sense. Do double-check the connections with onlilne examples of N-channel MOSFET circuit examples (I'm paranoid about PFET and NFET connections myself). It's possible that the readings can be explained by a reversed NFET and the V(DS) dropping across the tiny body diode.
So, V(GS) = 3.28V (okay) so check / clarify the following: V(DS), V(Source-GND), V(Drain-GND)
Statistics: Posted by katak255 — Sat Jan 25, 2025 2:42 am